1. Field of the Invention
This invention relates to a register file, a data processing apparatus having a register file, and a method of updating a register file. More particularly, this invention relates to a register file, data processing apparatus and method in which a plurality of register entries are provided for storing data values for use in the execution of data processing instructions.
2. Description of the Prior Art
A register file is a set of registers typically provided in, or in association with, a processor such as a central processing unit (CPU). The register file temporarily stores data while it is being operated on by the processor. For example, data may be transferred from a memory to the register file when it is required to be operated on as part of a data processing operation, and data generated by a data processing operation may be stored to a register file before either being transferred to the memory or used by a subsequent data processing operation.
A register file has at least one write port, via which data is written into one or more registers of the register file, and at least one read port, via which data are read from one or more registers of the register file. A read port may comprise circuitry responsive to a read request received at the read port to output a data value contained in one or more registers identified by an address specified by the read request. A write port may comprise circuitry responsive to a write request received at the write port to update one or more registers identified by an address specified by the write request with a data value specified by the write request. In this way, data can be written to and read from the register file.
One way of increasing the performance of a processor is to allow folding, or dual-issue of certain operations, thereby reducing the effective number of cycles per instruction (CPI) of the processor. Supporting dual-issue requires the extension of the register file to provide additional read ports (to support the increased number of input operands required per cycle) and additional write ports (to allow commitment of the multiple computed results). Adding read and/or write ports to a processor design is expensive in terms of gate-count, and is thus undesirable in low-area designs. Folding is the ability to execute instructions that do not require register file access in parallel with other instructions, for example NOPs (no-operation instructions), branch instructions and in the case IF-THEN-ELSE instructions, where no source operands are required and only flags are updated. Folding therefore allows improved performance without the provision of additional read and/or write ports, but only where one of the instructions to be executed in parallel does not require access to the register file.
In US-A-2004/0225838, a register cache is provided in order to assist in alleviating demands on access ports associated with the register file.